PGA302
Every spec below is cited to the manufacturer datasheet. Pick your exact ordering code, compare the closest alternatives, then ask the assistant what it means for your design.
What the PGA302 family does
The PGA302 is a low-drift, low-noise, programmable signal conditioner designed for resistive bridge sensor applications such as pressure, temperature, and level sensing. This device features dual analog front-end channels with programmable gain up to 200V/V, a 16-bit sigma-delta ADC, and an integrated 14-bit DAC for 0-5V ratio voltage output. It includes on-chip temperature and offset compensation algorithms stored in EEPROM, along with I2C and OneWire interfaces for system configuration. The PGA302 supports various sensor types including strain gauges and thermistors, making it suitable for automotive powertrain, HVAC, seat occupancy, and battery management systems.
PGA302 datasheet parameters
| Parameter | Min | Typ | Max | Conditions | Source |
|---|---|---|---|---|---|
| quiescent current | — | 6.5 mA | 10 mA | No load on VBRG, No load on DAC; idd; 5.3 Recommended Operating Conditions | TI datasheet, p. 5 — 5.3 Recommended Operating Conditions |
| output voltage | — | 80 µV | — | f = 10 Hz to 1 KHz, VDD = 4.5 V, DAC code = 1FFFh, no capacitor on DACCAP pin, temperature = 25°C; DAC Gain for DAC Output | TI datasheet, p. 12 — DAC Gain for DAC Output (continued) |
| output current | 9 mA | — | 25 mA | TA = 25°C; VVDD = 5 V; VBRG SUPPLY FOR RESISTIVE BRIDGE SENSORS | TI datasheet, p. 6 — 7.9 Bridge Sensor Supply |
| supply voltage range | 4.5 V | 5 V | 5.5 V | over operating free-air temperature range (unless otherwise noted) | TI datasheet, p. 4 — over operating free-air temperature range (unless otherwise noted) |
| input offset voltage | — | 14 µV | — | P Gain and T Gain Input Amplifiers (Chopper Stabilized) | TI datasheet, p. 8 — P Gain and T Gain Input Amplifiers (Chopper Stabilized) (continued) |
| gain bandwidth | — | 1 MHz | — | No Load, No DACCAP, Nominal Gain; 7.18 DAC Gain for DAC Output | TI datasheet, p. 11 — 7.18 DAC Gain for DAC Output |
| cmrr | 110 dB | — | — | FCM = 50 Hz; ensured by design; common; P Gain and T Gain Input Amplifiers (Chopper Stabilized) | TI datasheet, p. 8 — P Gain and T Gain Input Amplifiers (Chopper Stabilized) (continued) |
| operating temperature | -40 °C | — | 150 °C | over operating free-air temperature range (unless otherwise noted) | TI datasheet, p. 4 — over operating free-air temperature range (unless otherwise noted) |
| reverse voltage | -20 V | — | — | over operating free-air temperature range (unless otherwise noted) | TI datasheet, p. 5 — over operating free-air temperature range (unless otherwise noted) |
| input bias current | — | 5 nA | — | P Gain and T Gain Input Amplifiers (Chopper Stabilized) | TI datasheet, p. 8 — P Gain and T Gain Input Amplifiers (Chopper Stabilized) (continued) |
| slew rate | — | — | 5000 V/µs | VDD = 0 to 5 V; decoupling capacitor on VDD = 10 nF; over operating free-air temperature range (unless otherwise noted) | TI datasheet, p. 4 — over operating free-air temperature range (unless otherwise noted) |
| psrr | — | -35 dB | — | VDD Ripple Conditions:VDD DC Level = 5 VVDD Ripple Amplitude = 100 mVVDD Ripple Frequency Range: 30 Hz to 50 KHzCalculate PSRR using the formula:20\log10(\text{Amplitude of Reference Voltage}/\text{Amplitude of VDD ripple}); psrr; over operating free-air temperature range (unless otherwise noted) | TI datasheet, p. 5 — over operating free-air temperature range (unless otherwise noted) |
| data retention | — | 10 year | — | eeprom; 7.19 Non-Volatile Memory | TI datasheet, p. 13 — 7.19 Non-Volatile Memory |
| program erase cycles | — | — | 1 kcycle | eeprom; 7.19 Non-Volatile Memory | TI datasheet, p. 13 — 7.19 Non-Volatile Memory |
| sample rate | — | 10.4 kHz | — | ADC output sample period 96 us (sample period control bit = 0b00, no latency); decimation filter output rate configurable 96/128/192/256 us | TI datasheet, p. 8 — 7.13 Analog-to-Digital Converter |
| settling time | — | — | 100 µs | DAC Code 819d to 15564d step and CLOAD = 100 nF. Output is 99% of Final Value; (first order response); DAC Gain for DAC Output | TI datasheet, p. 12 — DAC Gain for DAC Output (continued) |