embedded processors controllers

STM32H742

Every spec below is cited to the manufacturer datasheet. Pick your exact ordering code, compare the closest alternatives, then ask the assistant what it means for your design.

00 — Overview

What the STM32H742 family does

The STM32H742xI/G and STM32H743xI/G are 32-bit Arm Cortex-M7 microcontrollers operating up to 480 MHz with up to 2 MB Flash and 1 MB RAM. These devices feature 168 GPIO ports, 35 communication peripherals including dual USB OTG and Ethernet MAC, and 11 analog peripherals such as three 16-bit ADCs. They support 1.62 to 3.6 V application supply and offer low-power modes consuming 2.95 µA in Standby. Available in LQFP, TFBGA, and UFBGA packages, they serve applications requiring high performance, complex graphics processing, and extensive connectivity options within industrial and consumer electronics.

Next step
Start building with STM32H742 → Every number above is cited straight from the datasheet — ask what they mean for your design, and the assistant answers from the same source documents.
Ordering code:
01 — Key specifications

STM32H742AG datasheet parameters

ParameterMinTypMaxConditionsSource
quiescent current 23 µA 30 µA idd(csi); CSI oscillator characteristics $ ^{(1)} $ ST datasheet, p. 130 — Table 48. CSI oscillator characteristics (continued)
output current 5 µA Max(VDDXXX) < VIN≤ 5.5 V(5)(6)(9); ileak; I/O static characteristics ST datasheet, p. 137 — Table 60. I/O static characteristics
supply voltage range 2 V 3.3 V 3.6 V vdda; OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
input offset voltage drift 3 µV/°C OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
input offset voltage 5 mV 10 mV vsc; COMP characteristics $ ^{(1)} $ ST datasheet, p. 179 — Table 98. COMP characteristics
gain bandwidth 4 MHz 7.3 MHz 12.3 MHz gbw; OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
cmrr 80 dB cmrr; OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
operating temperature -40 °C 125 °C Maximum power dissipation; ta ST datasheet, p. 212 — Table 122. General operating conditions (continued)
clock frequency 0 Hz 125 MHz fpp; Dynamic characteristics: SD / MMC characteristics, $ VDD = 2.7 $ to $ 3.6\ V^{(1)(2)} $ ST datasheet, p. 198 — Table 110. Dynamic characteristics: SD / MMC characteristics, to
propagation delay 50 ns 80 ns High-speed mode; td; COMP characteristics $ ^{(1)} $ ST datasheet, p. 179 — Table 98. COMP characteristics
slew rate 3 V/µs Normal mode; (from 10% and 90% of output voltage); OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
psrr -80 dB -28 dB Normal mode, DAC output buffer ON, CL≤ 50 pF, RL = 5 kΩ; psrr; DAC characteristics $ ^{(1)(2)} $ ST datasheet, p. 284 — Table 187. DAC characteristics
input voltage noise density 140 nV/√Hz output loaded with 4 kΩ; en; OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 182 — Table 99. OPAMP characteristics (continued)
cpu speed 480 MHz ST datasheet, p. 1
program memory size 1 MB ST datasheet, p. 19 — Table 2. STM32H742xI/G and STM32H743xI/G features and peripheral counts
ram size 692 KB ST datasheet, p. 26
io count 168 ST datasheet, p. 1
adc resolution 16 bit ST datasheet, p. 36
core size 32 bit ST datasheet, p. 1
rise time 11 ns C = 50 pF, 1.62 V≤VDD≤2.7 V ST datasheet, p. 143 — Table 64. Output timing characteristics (HSLV ON)
data retention 30 year 1 kcycle at TA = 85 °C; tret; Flash memory endurance and data retention ST datasheet, p. 133 — Table 54. Flash memory endurance and data retention
program erase cycles 10 kcycle TJ = -40 to +125 °C (6 suffix versions); Flash memory endurance and data retention ST datasheet, p. 133 — Table 54. Flash memory endurance and data retention
sample rate 2 MHz 16-bit resolution; fs; ADC characteristics $ ^{(1)} $ ST datasheet, p. 167 — Table 87. ADC characteristics
settling time 1.7 µs 2 µs Normal mode, DAC output buffer OFF, ±1LSB CL = 10 pF; tsettling; DAC characteristics $ ^{(1)} $ ST datasheet, p. 172 — Table 89. DAC characteristics
02 — FAQ

STM32H742AG frequently asked questions

What is the ADC resolution of the STM32H742AG?

The ADC resolution is 16 bit.

What is the clock frequency (fpp) for SD / MMC characteristics when VDD is 2.7 to 3.6 V?

The clock frequency (fpp) is 125 MHz.

What is the Common-Mode Rejection Ratio (CMRR) for the STM32H742AG OPAMP characteristics?

The CMRR is 80 dB.

What is the core size of the STM32H742AG?

The core size is 32 bit.

What is the maximum CPU speed of the STM32H742AG?

The maximum CPU speed is 480 MHz.

What is the data retention period for the STM32H742AG Flash memory after 1 kcycle at TA = 85 °C?

The data retention is 30 year.

What is the gain bandwidth of the STM32H742AG OPAMP?

The gain bandwidth is 7.3 MHz under gbw; OPAMP characteristics $ ^{(1)} $.

What is the input offset voltage under vsc COMP characteristics conditions?

The input offset voltage is 5 mV under vsc COMP characteristics conditions.

What is the input offset voltage drift for the OPAMP characteristics?

The input offset voltage drift is 3 µV/°C.

What is the input voltage noise density when the output is loaded with 4 kΩ?

The input voltage noise density is 140 nV/√Hz.

What is the I/O count for the STM32H742AG?

The I/O count is 168.

What is the operating temperature under the condition of maximum power dissipation at ta?

The operating temperature is -40 °C.

01 — Key specifications

STM32H742AI datasheet parameters

ParameterMinTypMaxConditionsSource
quiescent current 23 µA 30 µA idd(csi); CSI oscillator characteristics $ ^{(1)} $ ST datasheet, p. 130 — Table 48. CSI oscillator characteristics (continued)
output current 5 µA Max(VDDXXX) < VIN≤ 5.5 V(5)(6)(9); ileak; I/O static characteristics ST datasheet, p. 137 — Table 60. I/O static characteristics
supply voltage range 2 V 3.3 V 3.6 V vdda; OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
input offset voltage drift 3 µV/°C OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
input offset voltage 5 mV 10 mV vsc; COMP characteristics $ ^{(1)} $ ST datasheet, p. 179 — Table 98. COMP characteristics
gain bandwidth 4 MHz 7.3 MHz 12.3 MHz gbw; OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
cmrr 80 dB cmrr; OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
operating temperature -40 °C 125 °C Maximum power dissipation; ta ST datasheet, p. 212 — Table 122. General operating conditions (continued)
clock frequency 0 Hz 125 MHz fpp; Dynamic characteristics: SD / MMC characteristics, $ VDD = 2.7 $ to $ 3.6\ V^{(1)(2)} $ ST datasheet, p. 198 — Table 110. Dynamic characteristics: SD / MMC characteristics, to
propagation delay 50 ns 80 ns High-speed mode; td; COMP characteristics $ ^{(1)} $ ST datasheet, p. 179 — Table 98. COMP characteristics
slew rate 3 V/µs Normal mode; (from 10% and 90% of output voltage); OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
psrr -80 dB -28 dB Normal mode, DAC output buffer ON, CL≤ 50 pF, RL = 5 kΩ; psrr; DAC characteristics $ ^{(1)(2)} $ ST datasheet, p. 284 — Table 187. DAC characteristics
input voltage noise density 140 nV/√Hz output loaded with 4 kΩ; en; OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 182 — Table 99. OPAMP characteristics (continued)
cpu speed 480 MHz ST datasheet, p. 1
program memory size 2 MB ST datasheet, p. 19 — Table 2. STM32H742xI/G and STM32H743xI/G features and peripheral counts
ram size 692 KB ST datasheet, p. 26
io count 168 ST datasheet, p. 1
adc resolution 16 bit ST datasheet, p. 36
core size 32 bit ST datasheet, p. 1
rise time 11 ns C = 50 pF, 1.62 V≤VDD≤2.7 V ST datasheet, p. 143 — Table 64. Output timing characteristics (HSLV ON)
data retention 30 year 1 kcycle at TA = 85 °C; tret; Flash memory endurance and data retention ST datasheet, p. 133 — Table 54. Flash memory endurance and data retention
program erase cycles 10 kcycle TJ = -40 to +125 °C (6 suffix versions); Flash memory endurance and data retention ST datasheet, p. 133 — Table 54. Flash memory endurance and data retention
sample rate 2 MHz 16-bit resolution; fs; ADC characteristics $ ^{(1)} $ ST datasheet, p. 167 — Table 87. ADC characteristics
settling time 1.7 µs 2 µs Normal mode, DAC output buffer OFF, ±1LSB CL = 10 pF; tsettling; DAC characteristics $ ^{(1)} $ ST datasheet, p. 172 — Table 89. DAC characteristics
02 — FAQ

STM32H742AI frequently asked questions

What is the ADC resolution of the STM32H742AI?

The ADC resolution is 16 bit.

What is the clock frequency (fpp) for SD / MMC characteristics when VDD is 2.7 to 3.6 V?

The clock frequency (fpp) is 125 MHz.

What is the CMRR of the OPAMP characteristics?

The CMRR is 80 dB.

What is the core size of the STM32H742AI?

The core size is 32 bit.

What is the maximum CPU speed of the STM32H742AI?

The maximum CPU speed is 480 MHz.

What is the data retention period for the STM32H742AI Flash memory after 1 kcycle at TA = 85 °C?

The data retention is 30 year.

What is the gain bandwidth of the STM32H742AI OPAMP?

The gain bandwidth is 7.3 MHz under gbw; OPAMP characteristics $ ^{(1)} $.

What is the input offset voltage under vsc conditions for COMP characteristics?

The input offset voltage is 5 mV.

What is the input offset voltage drift for the STM32H742AI under OPAMP characteristics conditions?

The input offset voltage drift is 3 µV/°C.

What is the input voltage noise density of the STM32H742AI OPAMP when the output is loaded with 4 kΩ?

The input voltage noise density is 140 nV/√Hz.

What is the I/O count for the STM32H742AI?

The I/O count is 168.

What is the operating temperature for maximum power dissipation at ta?

-40 °C

01 — Key specifications

STM32H742BG datasheet parameters

ParameterMinTypMaxConditionsSource
quiescent current 23 µA 30 µA idd(csi); CSI oscillator characteristics $ ^{(1)} $ ST datasheet, p. 130 — Table 48. CSI oscillator characteristics (continued)
output current 5 µA Max(VDDXXX) < VIN≤ 5.5 V(5)(6)(9); ileak; I/O static characteristics ST datasheet, p. 137 — Table 60. I/O static characteristics
supply voltage range 2 V 3.3 V 3.6 V vdda; OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
input offset voltage drift 3 µV/°C OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
input offset voltage 5 mV 10 mV vsc; COMP characteristics $ ^{(1)} $ ST datasheet, p. 179 — Table 98. COMP characteristics
gain bandwidth 4 MHz 7.3 MHz 12.3 MHz gbw; OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
cmrr 80 dB cmrr; OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
operating temperature -40 °C 125 °C Maximum power dissipation; ta ST datasheet, p. 212 — Table 122. General operating conditions (continued)
clock frequency 0 Hz 125 MHz fpp; Dynamic characteristics: SD / MMC characteristics, $ VDD = 2.7 $ to $ 3.6\ V^{(1)(2)} $ ST datasheet, p. 198 — Table 110. Dynamic characteristics: SD / MMC characteristics, to
propagation delay 50 ns 80 ns High-speed mode; td; COMP characteristics $ ^{(1)} $ ST datasheet, p. 179 — Table 98. COMP characteristics
slew rate 3 V/µs Normal mode; (from 10% and 90% of output voltage); OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
psrr -80 dB -28 dB Normal mode, DAC output buffer ON, CL≤ 50 pF, RL = 5 kΩ; psrr; DAC characteristics $ ^{(1)(2)} $ ST datasheet, p. 284 — Table 187. DAC characteristics
input voltage noise density 140 nV/√Hz output loaded with 4 kΩ; en; OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 182 — Table 99. OPAMP characteristics (continued)
cpu speed 480 MHz ST datasheet, p. 1
program memory size 1 MB ST datasheet, p. 19 — Table 2. STM32H742xI/G and STM32H743xI/G features and peripheral counts
ram size 692 KB ST datasheet, p. 26
io count 168 ST datasheet, p. 1
adc resolution 16 bit ST datasheet, p. 36
core size 32 bit ST datasheet, p. 1
rise time 11 ns C = 50 pF, 1.62 V≤VDD≤2.7 V ST datasheet, p. 143 — Table 64. Output timing characteristics (HSLV ON)
data retention 30 year 1 kcycle at TA = 85 °C; tret; Flash memory endurance and data retention ST datasheet, p. 133 — Table 54. Flash memory endurance and data retention
program erase cycles 10 kcycle TJ = -40 to +125 °C (6 suffix versions); Flash memory endurance and data retention ST datasheet, p. 133 — Table 54. Flash memory endurance and data retention
sample rate 2 MHz 16-bit resolution; fs; ADC characteristics $ ^{(1)} $ ST datasheet, p. 167 — Table 87. ADC characteristics
settling time 1.7 µs 2 µs Normal mode, DAC output buffer OFF, ±1LSB CL = 10 pF; tsettling; DAC characteristics $ ^{(1)} $ ST datasheet, p. 172 — Table 89. DAC characteristics
02 — FAQ

STM32H742BG frequently asked questions

What is the ADC resolution for the STM32H742BG?

The ADC resolution is 16 bit.

What is the clock frequency (fpp) for SD / MMC characteristics when VDD is 2.7 to 3.6 V?

The clock frequency (fpp) is 125 MHz.

What is the Common-Mode Rejection Ratio (CMRR) for the OPAMP characteristics?

The CMRR is 80 dB.

What is the core size of the STM32H742BG?

The core size is 32 bit.

What is the maximum CPU speed of the STM32H742BG?

The maximum CPU speed is 480 MHz.

What is the data retention period for the STM32H742BG Flash memory after 1 kcycle at TA = 85 °C?

The data retention is 30 year.

What is the gain bandwidth product of the OPAMP?

The gain bandwidth product is 7.3 MHz under gbw; OPAMP characteristics $ ^{(1)} $.

What is the input offset voltage under vsc conditions for COMP characteristics?

The input offset voltage is 5 mV under vsc conditions for COMP characteristics.

What is the input offset voltage drift for the STM32H742BG under OPAMP characteristics (1)?

The input offset voltage drift is 3 µV/°C.

What is the input voltage noise density when the output is loaded with 4 kΩ?

The input voltage noise density is 140 nV/√Hz.

What is the I/O count for the STM32H742BG?

The I/O count is 168.

What is the operating temperature under the condition of maximum power dissipation at ta?

The operating temperature is -40 °C.

01 — Key specifications

STM32H742BI datasheet parameters

ParameterMinTypMaxConditionsSource
quiescent current 23 µA 30 µA idd(csi); CSI oscillator characteristics $ ^{(1)} $ ST datasheet, p. 130 — Table 48. CSI oscillator characteristics (continued)
output current 5 µA Max(VDDXXX) < VIN≤ 5.5 V(5)(6)(9); ileak; I/O static characteristics ST datasheet, p. 137 — Table 60. I/O static characteristics
supply voltage range 2 V 3.3 V 3.6 V vdda; OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
input offset voltage drift 3 µV/°C OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
input offset voltage 5 mV 10 mV vsc; COMP characteristics $ ^{(1)} $ ST datasheet, p. 179 — Table 98. COMP characteristics
gain bandwidth 4 MHz 7.3 MHz 12.3 MHz gbw; OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
cmrr 80 dB cmrr; OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
operating temperature -40 °C 125 °C Maximum power dissipation; ta ST datasheet, p. 212 — Table 122. General operating conditions (continued)
clock frequency 0 Hz 125 MHz fpp; Dynamic characteristics: SD / MMC characteristics, $ VDD = 2.7 $ to $ 3.6\ V^{(1)(2)} $ ST datasheet, p. 198 — Table 110. Dynamic characteristics: SD / MMC characteristics, to
propagation delay 50 ns 80 ns High-speed mode; td; COMP characteristics $ ^{(1)} $ ST datasheet, p. 179 — Table 98. COMP characteristics
slew rate 3 V/µs Normal mode; (from 10% and 90% of output voltage); OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
psrr -80 dB -28 dB Normal mode, DAC output buffer ON, CL≤ 50 pF, RL = 5 kΩ; psrr; DAC characteristics $ ^{(1)(2)} $ ST datasheet, p. 284 — Table 187. DAC characteristics
input voltage noise density 140 nV/√Hz output loaded with 4 kΩ; en; OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 182 — Table 99. OPAMP characteristics (continued)
cpu speed 480 MHz ST datasheet, p. 1
program memory size 2 MB ST datasheet, p. 19 — Table 2. STM32H742xI/G and STM32H743xI/G features and peripheral counts
ram size 692 KB ST datasheet, p. 26
io count 168 ST datasheet, p. 1
adc resolution 16 bit ST datasheet, p. 36
core size 32 bit ST datasheet, p. 1
rise time 11 ns C = 50 pF, 1.62 V≤VDD≤2.7 V ST datasheet, p. 143 — Table 64. Output timing characteristics (HSLV ON)
data retention 30 year 1 kcycle at TA = 85 °C; tret; Flash memory endurance and data retention ST datasheet, p. 133 — Table 54. Flash memory endurance and data retention
program erase cycles 10 kcycle TJ = -40 to +125 °C (6 suffix versions); Flash memory endurance and data retention ST datasheet, p. 133 — Table 54. Flash memory endurance and data retention
sample rate 2 MHz 16-bit resolution; fs; ADC characteristics $ ^{(1)} $ ST datasheet, p. 167 — Table 87. ADC characteristics
settling time 1.7 µs 2 µs Normal mode, DAC output buffer OFF, ±1LSB CL = 10 pF; tsettling; DAC characteristics $ ^{(1)} $ ST datasheet, p. 172 — Table 89. DAC characteristics
02 — FAQ

STM32H742BI frequently asked questions

What is the ADC resolution of the STM32H742BI?

The ADC resolution is 16 bit.

What is the clock frequency (fpp) for SD / MMC characteristics when VDD is 2.7 to 3.6 V?

The clock frequency (fpp) is 125 MHz.

What is the Common-Mode Rejection Ratio (CMRR) for the OPAMP characteristics?

The CMRR is 80 dB under the condition of OPAMP characteristics.

What is the core size of the STM32H742BI?

The core size is 32 bit.

What is the maximum CPU speed of the STM32H742BI?

The maximum CPU speed is 480 MHz.

What is the data retention period for the STM32H742BI Flash memory under the condition of 1 kcycle at TA = 85 °C?

The data retention is 30 year.

What is the gain bandwidth of the STM32H742BI OPAMP?

The gain bandwidth is 7.3 MHz under the condition gbw; OPAMP characteristics $ ^{(1)} $.

What is the input offset voltage under vsc conditions for COMP characteristics?

The input offset voltage is 5 mV under vsc conditions for COMP characteristics.

What is the input offset voltage drift for the OPAMP characteristics?

The input offset voltage drift is 3 µV/°C.

What is the input voltage noise density when the output is loaded with 4 kΩ?

The input voltage noise density is 140 nV/√Hz.

What is the I/O count for the STM32H742BI?

The I/O count is 168.

What is the operating temperature under the condition of Maximum power dissipation; ta?

The operating temperature is -40 °C.

01 — Key specifications

STM32H742IG datasheet parameters

ParameterMinTypMaxConditionsSource
quiescent current 23 µA 30 µA idd(csi); CSI oscillator characteristics $ ^{(1)} $ ST datasheet, p. 130 — Table 48. CSI oscillator characteristics (continued)
output current 5 µA Max(VDDXXX) < VIN≤ 5.5 V(5)(6)(9); ileak; I/O static characteristics ST datasheet, p. 137 — Table 60. I/O static characteristics
supply voltage range 2 V 3.3 V 3.6 V vdda; OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
input offset voltage drift 3 µV/°C OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
input offset voltage 5 mV 10 mV vsc; COMP characteristics $ ^{(1)} $ ST datasheet, p. 179 — Table 98. COMP characteristics
gain bandwidth 4 MHz 7.3 MHz 12.3 MHz gbw; OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
cmrr 80 dB cmrr; OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
operating temperature -40 °C 125 °C Maximum power dissipation; ta ST datasheet, p. 212 — Table 122. General operating conditions (continued)
clock frequency 0 Hz 125 MHz fpp; Dynamic characteristics: SD / MMC characteristics, $ VDD = 2.7 $ to $ 3.6\ V^{(1)(2)} $ ST datasheet, p. 198 — Table 110. Dynamic characteristics: SD / MMC characteristics, to
propagation delay 50 ns 80 ns High-speed mode; td; COMP characteristics $ ^{(1)} $ ST datasheet, p. 179 — Table 98. COMP characteristics
slew rate 3 V/µs Normal mode; (from 10% and 90% of output voltage); OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 180 — Table 99. OPAMP characteristics
psrr -80 dB -28 dB Normal mode, DAC output buffer ON, CL≤ 50 pF, RL = 5 kΩ; psrr; DAC characteristics $ ^{(1)(2)} $ ST datasheet, p. 284 — Table 187. DAC characteristics
input voltage noise density 140 nV/√Hz output loaded with 4 kΩ; en; OPAMP characteristics $ ^{(1)} $ ST datasheet, p. 182 — Table 99. OPAMP characteristics (continued)
cpu speed 480 MHz ST datasheet, p. 1
program memory size 1 MB ST datasheet, p. 19 — Table 2. STM32H742xI/G and STM32H743xI/G features and peripheral counts
ram size 692 KB ST datasheet, p. 26
io count 168 ST datasheet, p. 1
adc resolution 16 bit ST datasheet, p. 36
core size 32 bit ST datasheet, p. 1
rise time 11 ns C = 50 pF, 1.62 V≤VDD≤2.7 V ST datasheet, p. 143 — Table 64. Output timing characteristics (HSLV ON)
data retention 30 year 1 kcycle at TA = 85 °C; tret; Flash memory endurance and data retention ST datasheet, p. 133 — Table 54. Flash memory endurance and data retention
program erase cycles 10 kcycle TJ = -40 to +125 °C (6 suffix versions); Flash memory endurance and data retention ST datasheet, p. 133 — Table 54. Flash memory endurance and data retention
sample rate 2 MHz 16-bit resolution; fs; ADC characteristics $ ^{(1)} $ ST datasheet, p. 167 — Table 87. ADC characteristics
settling time 1.7 µs 2 µs Normal mode, DAC output buffer OFF, ±1LSB CL = 10 pF; tsettling; DAC characteristics $ ^{(1)} $ ST datasheet, p. 172 — Table 89. DAC characteristics
02 — FAQ

STM32H742IG frequently asked questions

What is the ADC resolution of the STM32H742IG?

The ADC resolution is 16 bit.

What is the clock frequency (fpp) for SD / MMC characteristics when VDD is 2.7 to 3.6 V?

The clock frequency (fpp) is 125 MHz.

What is the Common-Mode Rejection Ratio (CMRR) for the OPAMP characteristics?

The CMRR is 80 dB under the condition of OPAMP characteristics.

What is the core size of the STM32H742IG?

The core size is 32 bit.

What is the maximum CPU speed of the STM32H742IG?

The maximum CPU speed is 480 MHz.

What is the data retention period for the STM32H742IG Flash memory after 1 kcycle at TA = 85 °C?

The data retention is 30 year.

What is the gain bandwidth of the STM32H742IG under gbw; OPAMP characteristics $ ^{(1)} $ conditions?

The gain bandwidth is 7.3 MHz.

What is the input offset voltage under vsc COMP characteristics conditions?

The input offset voltage is 5 mV under vsc COMP characteristics conditions.

What is the input offset voltage drift for the STM32H742IG under OPAMP characteristics conditions?

The input offset voltage drift is 3 µV/°C.

What is the input voltage noise density when the output is loaded with 4 kΩ?

The input voltage noise density is 140 nV/√Hz.

What is the I/O count for the STM32H742IG?

The I/O count is 168.

What is the operating temperature under the condition of maximum power dissipation at ta?

-40 °C

03 — Alternatives

Closest matches to STM32H742

STM32G431C6 3.3× higher input offset voltage drift, 3.0× lower propagation delay, 2.8× lower cpu speed
MSP430FR2310 3.9× lower clock frequency, 3.3× higher data retention, 2.0× lower core size
STM32G071C8 19.2× lower ram size, 16.0× lower program memory size, 9.1× higher rise time
STM32F405OE 3.5× lower ram size, 2.9× lower cpu speed, 1.8× higher settling time
STM32F405OET6 3.5× lower ram size, 2.9× lower cpu speed, 1.8× higher settling time
MSPM0G3505SDGS28 6.2× lower clock frequency, 6.0× lower cpu speed, 3.3× lower input voltage noise density
MSPM0G3507 8.2× lower program memory size, 6.2× lower clock frequency, 6.0× lower cpu speed
STM32F072C8 16.0× lower program memory size, 11.4× higher rise time, 10.0× lower cpu speed
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