EFM8BB21F16
Every spec below is cited to the manufacturer datasheet. Pick your exact ordering code, compare the closest alternatives, then ask the assistant what it means for your design.
What the EFM8BB21F16 family does
The EFM8BB2 family are 8-bit microcontrollers featuring a pipelined CIP-51 core running up to 50 MHz. These devices integrate 16 KB of flash memory, 2304 bytes of RAM, and up to 22 multifunction I/O pins. Key specifications include a 12-bit ADC, five 16-bit timers, two UARTs, and SPI/I2C interfaces. Available in commercial, industrial, and automotive temperature grades, they operate on a single 2.2 to 5.25 V supply. The parts come in QFN28, QFN20, and QSOP24 packages. Engineers typically use them for motor control, medical equipment, consumer electronics, lighting systems, and sensor controllers due to their comprehensive peripheral set and small footprint.
EFM8BB21F16A-C-QFN20 datasheet parameters
| Parameter | Min | Typ | Max | Conditions | Source |
|---|---|---|---|---|---|
| supply voltage range | 3 V | — | 5.25 V | 5V Voltage Regulator | SiliconLabs datasheet, p. 25 — Table 4.12. 5V Voltage Regulator |
| input offset voltage | -10 mV | 0 V | 10 mV | TA = 25 °C; Comparators | SiliconLabs datasheet, p. 26 — Table 4.13. Comparators |
| operating temperature | -40 °C | — | 85 °C | G-grade devices; Recommended Operating Conditions | SiliconLabs datasheet, p. 16 — Table 4.1. Recommended Operating Conditions |
| clock frequency | 0 Hz | — | 50 MHz | (at extclk pin); External Clock Input | SiliconLabs datasheet, p. 22 — Table 4.7. External Clock Input |
| dropout voltage | — | — | 800 mV | Output Current = 100 mA; 5V Voltage Regulator | SiliconLabs datasheet, p. 25 — Table 4.12. 5V Voltage Regulator |
| cpu speed | — | 50 MHz | — | SiliconLabs datasheet, p. 1 | |
| program memory size | — | 15.6 KB | — | flash | SiliconLabs datasheet, p. 4 — 2. Ordering Information |
| ram size | — | 2.25 KB | — | ram | SiliconLabs datasheet, p. 4 — 2. Ordering Information |
| io count | — | 16 | — | SiliconLabs datasheet, p. 4 — 2. Ordering Information | |
| adc resolution | — | 12 bit | — | SiliconLabs datasheet, p. 23 — Table 4.8. ADC | |
| core size | — | 8 bit | — | SiliconLabs datasheet, p. 1 | |
| program erase cycles | 20 kcycle | 100 kcycle | — | endurance(write/erase cycles); Flash Memory | SiliconLabs datasheet, p. 20 — Table 4.4. Flash Memory |
EFM8BB21F16A-C-QFN20 frequently asked questions
What is the ADC resolution?
The ADC resolution is 12 bit.
What is the clock frequency at the extclk pin for external clock input?
The clock frequency is 50 MHz at the extclk pin for external clock input.
What is the core size of the EFM8BB21F16A-C-QFN20?
The core size is 8 bit.
What is the maximum CPU speed of the EFM8BB21F16A-C-QFN20?
The maximum CPU speed is 50 MHz.
What is the dropout voltage of the EFM8BB21F16A-C-QFN20 when the output current is 100 mA and the voltage regulator is 5V?
The dropout voltage is 800 mV.
What is the input offset voltage for the comparators at TA = 25 °C?
The input offset voltage is 0 V.
What is the I/O count for the EFM8BB21F16A-C-QFN20?
The I/O count is 16.
What is the operating temperature for G-grade devices under Recommended Operating Conditions?
The operating temperature is 85 °C for G-grade devices under Recommended Operating Conditions.
What is the endurance for write/erase cycles of the Flash Memory?
The program erase cycles endurance for the Flash Memory is 100 kcycle.
What is the program memory size of the EFM8BB21F16A-C-QFN20 in flash?
The program memory size is 15.6 KB.
What is the RAM size of the EFM8BB21F16A-C-QFN20?
The RAM size is 2.25 KB.
What is the supply voltage range for the EFM8BB21F16A-C-QFN20 when the 5V Voltage Regulator is active?
The supply voltage range is 5.25 V.
EFM8BB21F16G-C-QFN20 datasheet parameters
| Parameter | Min | Typ | Max | Conditions | Source |
|---|---|---|---|---|---|
| quiescent current | — | 820 µA | 1.2 mA | 800 kspm, 10-bit conversions or200 kspm, 12-bit conversionsNormal bias settingsVDD = 3.0 V; Analog Peripheral Supply Currents (-40 °C to +125 °C) | SiliconLabs datasheet, p. 18 — 4.1.2 Power Consumption |
| output current | — | — | 100 mA | 5V Voltage Regulator | SiliconLabs datasheet, p. 25 — Table 4.12. 5V Voltage Regulator |
| supply voltage range | 3 V | — | 5.25 V | 5V Voltage Regulator | SiliconLabs datasheet, p. 25 — Table 4.12. 5V Voltage Regulator |
| input offset voltage | -10 mV | 0 V | 10 mV | TA = 25 °C; Comparators | SiliconLabs datasheet, p. 26 — Table 4.13. Comparators |
| cmrr | — | 70 dB | — | common; Comparators | SiliconLabs datasheet, p. 26 — Table 4.13. Comparators |
| operating temperature | -40 °C | — | 85 °C | G-grade devices; Recommended Operating Conditions | SiliconLabs datasheet, p. 16 — Table 4.1. Recommended Operating Conditions |
| clock frequency | 0 Hz | — | 50 MHz | (at extclk pin); External Clock Input | SiliconLabs datasheet, p. 22 — Table 4.7. External Clock Input |
| psrr | — | 70 dB | — | ADC | SiliconLabs datasheet, p. 23 — Table 4.8. ADC |
| dropout voltage | — | — | 800 mV | Output Current = 100 mA; 5V Voltage Regulator | SiliconLabs datasheet, p. 25 — Table 4.12. 5V Voltage Regulator |
| cpu speed | — | 50 MHz | — | SiliconLabs datasheet, p. 1 | |
| program memory size | — | 15.6 KB | — | flash | SiliconLabs datasheet, p. 3 — Table 2.1. Product Selection Guide |
| ram size | — | 2.25 KB | — | ram | SiliconLabs datasheet, p. 3 — Table 2.1. Product Selection Guide |
| io count | — | 16 | — | SiliconLabs datasheet, p. 3 — Table 2.1. Product Selection Guide | |
| adc resolution | — | 12 bit | — | SiliconLabs datasheet, p. 23 — Table 4.8. ADC | |
| core size | — | 8 bit | — | SiliconLabs datasheet, p. 1 | |
| program erase cycles | 20 kcycle | 100 kcycle | — | endurance(write/erase cycles); Flash Memory | SiliconLabs datasheet, p. 20 — Table 4.4. Flash Memory |
| output voltage low | — | — | 600 mV | IOL = 13.5 mA, VDD≥ 3.0 V; (high drive); Port I/O | SiliconLabs datasheet, p. 27 — Table 4.14. Port I/O |
EFM8BB21F16G-C-QSOP24 datasheet parameters
| Parameter | Min | Typ | Max | Conditions | Source |
|---|---|---|---|---|---|
| quiescent current | — | 820 µA | 1.2 mA | 800 kspm, 10-bit conversions or200 kspm, 12-bit conversionsNormal bias settingsVDD = 3.0 V; Analog Peripheral Supply Currents (-40 °C to +125 °C) | SiliconLabs datasheet, p. 18 — 4.1.2 Power Consumption |
| output current | — | — | 100 mA | 5V Voltage Regulator | SiliconLabs datasheet, p. 25 — Table 4.12. 5V Voltage Regulator |
| supply voltage range | 3 V | — | 5.25 V | 5V Voltage Regulator | SiliconLabs datasheet, p. 25 — Table 4.12. 5V Voltage Regulator |
| input offset voltage | -10 mV | 0 V | 10 mV | TA = 25 °C; Comparators | SiliconLabs datasheet, p. 26 — Table 4.13. Comparators |
| cmrr | — | 70 dB | — | common; Comparators | SiliconLabs datasheet, p. 26 — Table 4.13. Comparators |
| operating temperature | -40 °C | — | 85 °C | G-grade devices; Recommended Operating Conditions | SiliconLabs datasheet, p. 16 — Table 4.1. Recommended Operating Conditions |
| clock frequency | 0 Hz | — | 50 MHz | (at extclk pin); External Clock Input | SiliconLabs datasheet, p. 22 — Table 4.7. External Clock Input |
| psrr | — | 70 dB | — | ADC | SiliconLabs datasheet, p. 23 — Table 4.8. ADC |
| dropout voltage | — | — | 800 mV | Output Current = 100 mA; 5V Voltage Regulator | SiliconLabs datasheet, p. 25 — Table 4.12. 5V Voltage Regulator |
| cpu speed | — | 50 MHz | — | SiliconLabs datasheet, p. 1 | |
| program memory size | — | 15.6 KB | — | flash | SiliconLabs datasheet, p. 3 — Table 2.1. Product Selection Guide |
| ram size | — | 2.25 KB | — | ram | SiliconLabs datasheet, p. 3 — Table 2.1. Product Selection Guide |
| io count | — | 21 | — | SiliconLabs datasheet, p. 3 — Table 2.1. Product Selection Guide | |
| adc resolution | — | 12 bit | — | SiliconLabs datasheet, p. 23 — Table 4.8. ADC | |
| core size | — | 8 bit | — | SiliconLabs datasheet, p. 1 | |
| program erase cycles | 20 kcycle | 100 kcycle | — | endurance(write/erase cycles); Flash Memory | SiliconLabs datasheet, p. 20 — Table 4.4. Flash Memory |
| output voltage low | — | — | 600 mV | IOL = 13.5 mA, VDD≥ 3.0 V; (high drive); Port I/O | SiliconLabs datasheet, p. 27 — Table 4.14. Port I/O |
EFM8BB21F16I-C-QFN20 datasheet parameters
| Parameter | Min | Typ | Max | Conditions | Source |
|---|---|---|---|---|---|
| quiescent current | — | 820 µA | 1.2 mA | 800 kspm, 10-bit conversions or200 kspm, 12-bit conversionsNormal bias settingsVDD = 3.0 V; Analog Peripheral Supply Currents (-40 °C to +125 °C) | SiliconLabs datasheet, p. 18 — 4.1.2 Power Consumption |
| output current | — | — | 100 mA | 5V Voltage Regulator | SiliconLabs datasheet, p. 25 — Table 4.12. 5V Voltage Regulator |
| supply voltage range | 3 V | — | 5.25 V | 5V Voltage Regulator | SiliconLabs datasheet, p. 25 — Table 4.12. 5V Voltage Regulator |
| input offset voltage | -10 mV | 0 V | 10 mV | TA = 25 °C; Comparators | SiliconLabs datasheet, p. 26 — Table 4.13. Comparators |
| cmrr | — | 70 dB | — | common; Comparators | SiliconLabs datasheet, p. 26 — Table 4.13. Comparators |
| operating temperature | -40 °C | — | 85 °C | G-grade devices; Recommended Operating Conditions | SiliconLabs datasheet, p. 16 — Table 4.1. Recommended Operating Conditions |
| clock frequency | 0 Hz | — | 50 MHz | (at extclk pin); External Clock Input | SiliconLabs datasheet, p. 22 — Table 4.7. External Clock Input |
| psrr | — | 70 dB | — | ADC | SiliconLabs datasheet, p. 23 — Table 4.8. ADC |
| dropout voltage | — | — | 800 mV | Output Current = 100 mA; 5V Voltage Regulator | SiliconLabs datasheet, p. 25 — Table 4.12. 5V Voltage Regulator |
| cpu speed | — | 50 MHz | — | SiliconLabs datasheet, p. 1 | |
| program memory size | — | 15.6 KB | — | flash | SiliconLabs datasheet, p. 4 — 2. Ordering Information |
| ram size | — | 2.25 KB | — | ram | SiliconLabs datasheet, p. 4 — 2. Ordering Information |
| io count | — | 16 | — | SiliconLabs datasheet, p. 4 — 2. Ordering Information | |
| adc resolution | — | 12 bit | — | SiliconLabs datasheet, p. 23 — Table 4.8. ADC | |
| core size | — | 8 bit | — | SiliconLabs datasheet, p. 1 | |
| program erase cycles | 20 kcycle | 100 kcycle | — | endurance(write/erase cycles); Flash Memory | SiliconLabs datasheet, p. 20 — Table 4.4. Flash Memory |
| output voltage low | — | — | 600 mV | IOL = 13.5 mA, VDD≥ 3.0 V; (high drive); Port I/O | SiliconLabs datasheet, p. 27 — Table 4.14. Port I/O |
EFM8BB21F16I-C-QSOP24 datasheet parameters
| Parameter | Min | Typ | Max | Conditions | Source |
|---|---|---|---|---|---|
| quiescent current | — | 820 µA | 1.2 mA | 800 kspm, 10-bit conversions or200 kspm, 12-bit conversionsNormal bias settingsVDD = 3.0 V; Analog Peripheral Supply Currents (-40 °C to +125 °C) | SiliconLabs datasheet, p. 18 — 4.1.2 Power Consumption |
| output current | — | — | 100 mA | 5V Voltage Regulator | SiliconLabs datasheet, p. 25 — Table 4.12. 5V Voltage Regulator |
| supply voltage range | 3 V | — | 5.25 V | 5V Voltage Regulator | SiliconLabs datasheet, p. 25 — Table 4.12. 5V Voltage Regulator |
| input offset voltage | -10 mV | 0 V | 10 mV | TA = 25 °C; Comparators | SiliconLabs datasheet, p. 26 — Table 4.13. Comparators |
| cmrr | — | 70 dB | — | common; Comparators | SiliconLabs datasheet, p. 26 — Table 4.13. Comparators |
| operating temperature | -40 °C | — | 85 °C | G-grade devices; Recommended Operating Conditions | SiliconLabs datasheet, p. 16 — Table 4.1. Recommended Operating Conditions |
| clock frequency | 0 Hz | — | 50 MHz | (at extclk pin); External Clock Input | SiliconLabs datasheet, p. 22 — Table 4.7. External Clock Input |
| psrr | — | 70 dB | — | ADC | SiliconLabs datasheet, p. 23 — Table 4.8. ADC |
| dropout voltage | — | — | 800 mV | Output Current = 100 mA; 5V Voltage Regulator | SiliconLabs datasheet, p. 25 — Table 4.12. 5V Voltage Regulator |
| cpu speed | — | 50 MHz | — | SiliconLabs datasheet, p. 1 | |
| program memory size | — | 15.6 KB | — | flash | SiliconLabs datasheet, p. 4 — 2. Ordering Information |
| ram size | — | 2.25 KB | — | ram | SiliconLabs datasheet, p. 4 — 2. Ordering Information |
| io count | — | 21 | — | SiliconLabs datasheet, p. 4 — 2. Ordering Information | |
| adc resolution | — | 12 bit | — | SiliconLabs datasheet, p. 23 — Table 4.8. ADC | |
| core size | — | 8 bit | — | SiliconLabs datasheet, p. 1 | |
| program erase cycles | 20 kcycle | 100 kcycle | — | endurance(write/erase cycles); Flash Memory | SiliconLabs datasheet, p. 20 — Table 4.4. Flash Memory |
| output voltage low | — | — | 600 mV | IOL = 13.5 mA, VDD≥ 3.0 V; (high drive); Port I/O | SiliconLabs datasheet, p. 27 — Table 4.14. Port I/O |