TP4056 LiPo Charger IC: Charge Current, System Loads, and Bench Verification

The TP4056 is a single-cell lithium-ion constant-current/constant-voltage linear charger IC in an ESOP-8 package, programmable up to 1 A of charge current with a single resistor and designed to run from a 5 V USB source or adapter. It charges one Li-ion cell to a fixed 4.2 V float, handles trickle pre-charge, termination, and auto-recharge automatically, and needs no external MOSFETs, sense resistors, or isolation diode — which is why it shows up in nearly every mini LiPo charger module and in the BOM of phones, MP3 players, Bluetooth/GPS devices, and digital cameras. If your product charges one 4.2 V Li-ion cell at ≤1 A from USB-class power, this part is on-target; if you need multi-cell, a different chemistry, or more than 1 A, it is out of spec by design.

Most integration mistakes with the TP4056 come from misreading a handful of datasheet numbers — the charge-current formula, the input window, the thermal behavior, and the low-power currents. This post walks through each number, what it means on your board, how to verify it on the bench, and what to do when a board doesn't behave.

The numbers engineers misread on the TP4056

RPROG = 1200 / I_BAT, accurate to ±10%. The charge current is set entirely by one resistor from PROG to ground. RPROG = 1.2 kΩ gives a nominal 1 A — but the real band is 930–1070 mA. RPROG = 2.4 kΩ gives 500 mA nominal, spanning 465–535 mA. Two things follow. First, don't quote the nominal as a guarantee; a 1% resistor can still land near the band edge because the part's internal reference tolerance stacks with yours. Second, the termination current is an absolute limit that scales with the setpoint: 0.085–0.115 A at 1.2 kΩ, 0.035–0.065 A at 2.4 kΩ. The C/10 figure is a ratio of termination current to the CC setpoint, not a fixed milliamp value.

Input window is 4.0–6.5 V, with UVLO at ~3.8 V. Below the undervoltage lockout (3.7–3.93 V rising, with 150–300 mV, typ 200 mV hysteresis), charging is disabled. A 5 V USB source is ideal. A marginal source hovering around 3.8–4.0 V will chatter charging on and off through the hysteresis — keep VCC comfortably above ~4 V under load. The absolute maximum on VCC, PROG, BAT, CE, and TEMP is 6.5 V, so a spiky or inductive input is what input-side clamping is for. Note that the CHRG/STDBY status pins are separately rated to 8 V — that headroom does not protect the supply pin.

Float voltage is fixed at 4.2 V. Nominal 4.2 V, spanning 4.17–4.263 V across 0–85 °C. It is not adjustable. This part charges a single 4.2 V Li-ion cell and nothing else — no resistor tweaks the target, and it is not for LiFePO4 or multi-cell stacks.

It's a linear charger, so heat is the real constraint. Power dissipated in the pass element is (VCC − VBAT) × I. At a 1 A setpoint charging a ~3.7 V cell from 5 V, that's about 1.3 W against a 1500 mW absolute-maximum dissipation. The part's answer to heat is not shutdown but thermal foldback: an internal loop reduces charge current once die temperature exceeds ~135 °C. That protects the silicon, but it means a hot board silently charges slower — easy to misread as a fault. Budget your copper so you don't lean on foldback in normal operation.

Two different low-power numbers — don't conflate them. Standby (after termination) input current is 50–100 µA; stop mode draws 35–70 µA from the input. But the battery-terminal draw is what matters for battery life: −2.5 µA typ in standby (0 to −6 µA), 1–2 µA in stop mode, 0–1 µA in sleep (VCC = 0 V), and <2 µA in shutdown (input removed or below battery voltage). Use the microamp battery-terminal figures for standby-life estimates; use the ICC figures only for input-supply sizing. One number is genuinely bad: with a reversed pack at −4 V, leakage is 0.7 mA typ — that's a fault drain, not a trickle.

Wiring the TP4056 into your design

The minimum BOM is small, which is the point of the part.

• RPROG from PROG to GND is the only component that defines charge rate. The PROG pin is internally regulated to ~1 V (0.93–1.07 V) with a 2 µA pull-up — that's the mechanism behind the 1200/R formula. Keep the resistor's return path clean; don't hang anything else on the node.
• CHRG and STDBY are open-drain. They must be pulled up — typically with the status LED and its series resistor (the datasheet's RLED). Tying them directly to a rail is exactly wrong. The verified drive point is a 0.35 V typ / 0.6 V max low level at 5 mA sink, so size the LED resistor for roughly 5 mA. CHRG sinks low while charging, STDBY sinks low when charge completes, and both go high-impedance otherwise. With no battery installed, CHRG flashes by design.
• CE is the enable. High (≥1.3 V) enables, low (≤0.7 V) disables. The datasheet gives thresholds but no internal pull — don't leave it floating. Tie it to VCC if you never disable, or drive it from a GPIO. Note that charging starts only when both CE is high and VCC is above UVLO.
• TEMP is optional. The thresholds are ratios of VCC, not absolute volts: below 42–45% VCC trips "too cold," above 80–83% VCC trips "too hot," driven by an NTC divider. Because they scale with your actual supply, tune the divider at your VCC — a divider tuned at 5.0 V doesn't automatically hold at 4.5 V. If you don't want temperature monitoring, tie TEMP to GND to disable it; don't leave it floating.
• Input network: the datasheet's typical application schematic uses 10 µF input and output capacitors and a 0.4 Ω input resistor. Keep that network close to the part to limit inrush and rail bounce while charging at 1 A.
• No reverse-protection parts needed. The IC has built-in battery anti-reverse protection: on a reversed pack it halts charging, drives the LED off, leaks <1 mA, and auto-restarts once the pack is connected correctly. You can also omit the isolation diode — the datasheet explicitly lists "no need for external MOSFETs, detection resistors, and isolation diodes."

One layout note the datasheet doesn't cover: it publishes no RθJA, no exposed-pad footprint geometry, and no layout guidelines. Working from the thermal budget instead — 1.3 W at 1 A from 5 V means you need roughly 85 °C/W effective at 25 °C ambient, and only ~62 °C/W at 55 °C — a bare SOP-8-class package with no thermal relief sits around 90+ °C/W, which is borderline or over. Solder the pad to a solid ground pour, add a thermal via array to inner/backside copper, keep VCC and BAT tracks short and wide, and keep the part away from other heat sources. Then measure: if you hit the 135 °C foldback in normal use, your charge rate is being silently throttled.

What the TP4056 will and won't do with a system load

The TP4056 has no power path — the battery sits directly on BAT and any system load is in parallel with it. Two consequences worth designing around:

• During charging, the setpoint limits total input current, so the battery receives (setpoint − load). A heavy load can push net battery current below the C/10 termination point and trigger premature termination on a not-full cell.
• After termination, a load that sags the battery more than 50 mV (typ) below the 4.2 V float, for longer than the ~1.8 ms recharge debounce, restarts a full CC cycle. With a persistent load you get a charge→discharge→recharge limit cycle: CHRG flickers, the charger bangs between standby and full current. That's the auto-recharge feature working as specified, not a fault. If you need the charger to sit quietly, switch the load off during charging, keep it small enough that sag stays under ~50 mV, or add an external power-path/ideal-diode arrangement.

Conversely, auto-recharge won't chase noise: sub-50 mV jitter won't restart a cycle, and the recharge threshold has a 0.8–4 ms debounce.

Bench verification for the TP4056

Every pass/fail threshold below is a datasheet number, so these are measurable, not vibes.

1. Input and UVLO. Sweep VCC up and down around 3.8 V. Charging must start above the 3.7–3.93 V rise threshold, stop below it, and not chatter. Confirm your rail stays ≥ ~4 V under full charge current and never approaches the 6.5 V abs-max.
2. Charge setpoint. With CE high and VCC above UVLO, measure BAT current: it must fall in the 930–1070 mA band at 1.2 kΩ (465–535 mA at 2.4 kΩ). Mid-band is healthy; edge-of-band means stacked tolerances.
3. CE gating. Pull CE low (≤0.7 V) → charging halts; high (≥1.3 V) → resumes.
4. Trickle path. With a cell below ~2.9 V (2.8–3.0 V threshold, 60–100 mV hysteresis), current must be trickle: 100 mA typ (80–120) at 1.2 kΩ, 50 mA typ (40–60) at 2.4 kΩ, then hand off to full CC above 2.9 V.
5. Float and termination. Log VBAT through the CC→CV transition — it must settle at 4.2 V (4.17–4.263 V). The cycle must end when current falls to the absolute limit: 0.085–0.115 A at 1.2 kΩ, 0.035–0.065 A at 2.4 kΩ, triggered when PROG sits below 100 mV for >1.8 ms.
6. Three low-power states. With an ammeter in series, record: standby ICC 50–100 µA with battery-terminal −2.5 µA typ; stop-mode ICC 35–70 µA with battery-terminal 1–2 µA; sleep (VCC = 0 V) battery-terminal 0–1 µA. Keep the battery-terminal numbers for battery-life math and the ICC numbers for supply sizing.
7. Status LEDs. CHRG on during charge, STDBY on after termination, CHRG flashing with no battery. Verify sink current is in the ~5 mA region so the low level stays ≤0.6 V.
8. Auto-recharge. After termination, sink enough current off BAT to sag it 50–100 mV below float for >1.8 ms — a new cycle must begin. Confirm it does not restart on sub-50 mV jitter.
9. Reverse polarity. Connect the pack reversed: charging must halt, the LED go off, leakage stay ≤0.7 mA typ, and the part auto-recover on correct hookup.
10. NTC (if enabled). Heat and cool the NTC and confirm charge gating at 42–45% and 80–83% of your VCC. If TEMP is tied to GND, confirm charging runs ungated.

Troubleshooting the TP4056

"No charging, CHRG never lights." Check the two gates that must both be satisfied: VCC above the ~3.8 V UVLO and CE high (≥1.3 V). A floating CE or a source sagging below ~3.8 V under load looks exactly like a dead charger.

"CHRG is flashing." Not a fault — that's the no-battery indicator. Check the pack connection and polarity first. (The datasheet gives no flash frequency; don't spec one into your UI without measuring your own part.)

"Charge current is way off or zero." Verify RPROG against the bands above. If the cell is deeply discharged (<2.9 V), low current is correct trickle behavior. Also check the PROG node: anything pulling it above the 1.15–1.3 V manual-shutdown threshold (typ 1.21 V rising, releasing at 0.9–1.1 V falling) silently shuts the charger down — a stray logic-high on PROG is a classic cause.

"Stops early / never fully charges." Termination happens at the absolute C/10 limit, and near 4.2 V the CV taper naturally drops current — low current at high cell voltage is normal. If it genuinely terminates low, check whether the cell reaches the 4.2 V float; an aged cell that sags won't top off, and the charger is doing its job. With a load on BAT, remember the load subtracts from charge current.

"LED off, CHRG high-Z." That's the reverse-connection protection state — check polarity, don't condemn the chip.

"Chip runs hot / charges slowly." Expected physics for a linear charger at (VCC − VBAT) × I. Foldback above ~135 °C reduces current rather than failing, so heat usually means "throttled," not "broken." Fix the copper, or lower the setpoint.

"Rails look noisy." The typical schematic's 10 µF input/output caps and 0.4 Ω input resistor are your starting point; verify VCC stays inside 4.0–6.5 V under your real load transients.

For charge-time planning at the 1 A setpoint, budget roughly 1.2–1.4 hours per amp-hour (a 1000 mAh cell ≈ 1 h 10 min, a 3000 mAh cell ≈ 3 h 30 min), plus a trickle leg if the cell starts below 2.9 V — these are estimates from the verified CC setpoint, 4.2 V float, and C/10 termination, not a published spec.

Part page: TP4056.