The TL062 is a dual JFET-input operational amplifier from STMicroelectronics with a 1 MHz gain-bandwidth product, a 3.5 V/µs typical slew rate, and an exceptionally frugal 200 µA typ / 250 µA max quiescent current per amplifier — roughly 6 mW typ total for the whole dual, no load. Its defining feature is the JFET input stage: input bias current of ~30 pA typ (200–400 pA max at 25 °C) and input resistance of 10¹² Ω typ, which lets you build stages around source and feedback impedances of 10 MΩ and beyond without the DC errors a bipolar op-amp would inject. It runs from a 6 V to 36 V total supply, comes in SO-8 and DIP8 packages in I-grade (−40 to +105 °C) and C-grade (0 to +70 °C) temperature ranges, and is internally frequency-compensated, so it needs no external compensation components. Its natural home is battery-powered and high-impedance signal conditioning — photodiode and pH-style front ends, high-impedance buffers, and general-purpose amplification where supply current matters more than DC precision or rail-to-rail swing.
Myth #1: "It's a low-power TL072, so it behaves like one at the rails" (What are the TL062's actual limits at the supply rails?)
The most common way engineers get burned by the TL062 is assuming that because its input common-mode range "extends to the positive rail," the part is rail-friendly in general. It isn't, in two specific ways:
- The input common-mode range does not reach the negative rail. At a ±15 V supply, the common-mode range is typ ±12 V and guaranteed ≥±11.5 V — it reaches toward the positive rail only. In a single-supply design, tying an input near ground puts it outside the guaranteed common-mode range, and the input stage will misbehave in ways that look like a fault but are just a spec violation. Bias inputs to a mid-rail reference instead.
- The output is not rail-to-rail. At RL = 10 kΩ and ±15 V rails, the datasheet guarantees only 20 Vpp minimum output swing (27 Vpp typ) — that's ±10 V min / ±13.5 V typ single-ended. That's 5 V minimum headroom from each rail (1.5 V typical). Plan on roughly ±(rail − 1.5 to 2) V usable swing as a design heuristic, and keep the load at ≥10 kΩ — swing shrinks as you load it, and the datasheet gives no verified swing spec below 10 kΩ.
Known limitation: The datasheet specifies output voltage swing only at RL = 10 kΩ. There is no 2 kΩ swing row in the electrical characteristics table, so how much swing degrades at heavier loads is not stated — treat any heavier-load swing figure as unverified and measure it on your own bench.
The flip side of the JFET story is genuinely good: the inputs are robust. Differential input voltage is rated to ±30 V, the part is latch-up free, and large sustained input differentials won't damage it. But the absolute-max note adds a critical condition: input magnitude must never exceed the supply magnitude or ±15 V, whichever is smaller. So the inputs tolerate big differentials between themselves, but neither input may be driven beyond ±15 V (or beyond your rails at lower supply). Keep input excursions inside the rails and clamp external transients that could exceed them.
Wiring It Up (How do I integrate the TL062 into a design?)
Supplies. The operating supply range is 6 V to 36 V total between the rails, with a ±18 V absolute-max rating giving real transient headroom — but stay within 6–36 V for guaranteed spec compliance. Never exceed ±18 V on any transient, including supply sequencing and inductive kickback on shared rails.
Single-supply biasing. Because the common-mode range stops short of the negative rail, single-supply stages need a mid-rail reference. The good news: with only 30 pA typ (400 pA max) of bias current, the bias network is essentially free. A divider of 2× 100 kΩ (50 kΩ Thevenin) produces a worst-case bias-current error of 400 pA × 50 kΩ = 0.020 mV — negligible against the part's own 9 mV (I-grade) / 15 mV (C-grade) offset. Even a 400 kΩ + 400 kΩ divider (200 kΩ Thevenin) adds only 0.08 mV. Decouple the mid-rail node with 1–10 µF: with a 50 kΩ Thevenin and 1 µF, the node pole sits at ~3.2 Hz, well below any audio-band signal. Pick R‖C so the node's −3 dB point sits at least ~10× below your lowest signal frequency.
Source impedance matching. Match the source impedances seen by the two inputs to cancel the (small) residual bias-current error. At 30 pA it's a modest effect, but at 10 MΩ source impedances even picoamps produce measurable offset drift, so matching both inputs is cheap insurance.
Compensation. None needed — the part is internally frequency-compensated. No external compensation components.
Grades and packages. Choose the suffix for your needs: the A/B grades are tighter-binned on offset (2–3 mV typ vs 3 mV typ / up to 9–15 mV max for base TL062), I-grade covers −40 to +105 °C, C-grade 0 to +70 °C. Rthja is 125 °C/W in SO-8 and 85 °C/W in DIP8.
The Myths That Cost You Margin (What specs are most often misread?)
- Myth: "Quiescent current is 200 µA, so my board draws 200 µA." The TL062 is a dual — budget ~400–500 µA for both halves, and that's no load. Output loading dominates real dissipation, not idle loss.
- Myth: "Infinite short-circuit protection means I can short it forever." Short-circuit duration is indeed rated "infinite" — but explicitly conditioned on not exceeding the 680 mW dissipation rating. A permanent short to a rail raises dissipation continuously and can still cook the part thermally. Don't build a fault design that relies on unbounded short-circuit survival.
- Myth: "The inputs are protected, so I don't need ESD measures." ESD ratings are modest: 900 V HBM, 150 V MM, 1.5 kV CDM. On any connector-exposed input this is insufficient — add external ESD protection at board edges rather than relying on the naked part.
- Myth: "The datasheet AC numbers apply at my supply." Slew rate, rise time, overshoot, and input noise are specified only at ±15 V, RL = 10 kΩ, CL = 100 pF, Av = 1. At a different supply or heavier load, re-derive your expectations rather than comparing against the table values.
- Myth: "Low bias current means low noise." Input-referred noise is 42 nV/√Hz at 1 kHz (RS = 100 Ω). This is a JFET-input low-power part, not a low-noise part — a high-source-impedance front end will be noise-limited well above the datasheet figure. The low bias current buys you DC error headroom, not noise headroom.
- Myth: "The two halves are independent." Channel separation is 120 dB typ (Av = 100) — good, but only a typ figure. If one half drives a heavy signal next to a sensitive buffer on the other half, share the supply node carefully with decoupling rather than assuming infinite isolation.
Bench Verification (How do I test a TL062 design?)
- Supply current as a health check. Measure idle rail current: 200 µA typ / 250 µA max per amplifier, no load (≈400–500 µA for the dual). Near zero means a missing supply; far above means a driven load or damaged output. This one measurement localizes most problems.
- Output swing at your actual conditions. Verify swing with your real rail and load, remembering the guaranteed figure is 20 Vpp min / 27 Vpp typ (±10 V min / ±13.5 V typ single-ended) only at ±15 V and RL = 10 kΩ. Clipping at a lower supply or heavier load is expected behavior, not a fault.
- Slew and transient response. Spec is 1.5 V/µs min / 3.5 V/µs typ at Av = 1, with 0.2 µs typ rise time and a 10% overshoot factor under the ±15 V / 10 kΩ / 100 pF test conditions. A ~10% overshoot is inherent to the part under those conditions — don't chase it as a wiring bug unless it grossly exceeds that.
- Noise floor. Verify your measured noise is consistent with 42 nV/√Hz input-referred at 1 kHz, plus the resistor noise of your source impedance. A high-impedance front end dominated by resistor noise is a design property, not a defect.
- Thermal. Do the junction calculation for the worst-case loaded output, not the idle figure: dissipation budget is 680 mW abs-max, with 125 °C/W (SO-8) or 85 °C/W (DIP8) junction-to-ambient. Idle heat is ≤7.5 mW total, so any serious warmth means output loading — compute it, don't assume.
- Input excursions. Confirm on the bench (including fault and transient conditions) that neither input ever exceeds the supply magnitude or ±15 V, whichever is smaller, and that common-mode stays inside the guaranteed range.
Troubleshooting (Why is my TL062 circuit misbehaving?)
Work this triage order:
- Rails within ±18 V and present? A supply transient past ±18 V abs-max can damage the part; a missing rail looks like "no output."
- Inputs inside limits? An input over-driven past ±15 V can kill the front end, leaving the output latched to a rail. A stuck output with correct rails usually means a damaged input stage (often ESD) or a broken feedback path — not the amp itself.
- Idle supply current ≈200–250 µA per amp? Near zero or far above flags a missing supply, a driven load, or damage.
- Expected swing/slew re-derived at your supply and load? Output saturating near a rail with signal present usually means the stage needs more swing than the part delivers at your operating point — the TL062 is not rail-to-rail, and clipping at low supply or heavy load is expected, not a fault.
- Noise or offset? Confirm 42 nV/√Hz and common-mode headroom before suspecting the part. An unexpected DC operating point is usually a bias/common-mode mistake (input biased outside the range, which stops short of the negative rail), not a failure. If noise appears correlated between channels, check whether one half is loading the shared supply node — bleed-through through the 120 dB typ separation can masquerade as noise.
- Failure correlates with handling? A part that works on the bench but dies after installation at a connector is very likely ESD-killed given the 900 V HBM / 150 V MM limits. Swap in a fresh unit to confirm, then add external protection.
- Running hot? With ≤7.5 mW idle dissipation, any real warmth means output loading — possibly a sustained short. The "infinite" short-circuit rating only holds within the 680 mW dissipation budget, so the fix is thermal headroom (lighter load, lower ambient), not replacing "defective" units.
One last design-level note: with a 1 MHz GBW and 3.5 V/µs typ slew, this is a good medium-speed part — size your closed-loop gain × bandwidth to stay inside the GBW, and remember a full ≈10 V output step takes ~3 µs at typical slew. If it oscillates on long feedback leads at high gain, that's layout and parasitic capacitance, not the part — it's fast enough to ring with a few pF of stray feedback, so keep the feedback path short.
Part page: TL062.