LIS2DH12: Q&A for Hardware Engineers — Wiring, Power, Self-Test, and Troubleshooting

The LIS2DH12 is ST's ultra-low-power 3-axis MEMS accelerometer with a user-selectable full scale of ±2/±4/±8/±16 g, three resolution modes (8-bit low-power, 10-bit normal, 12-bit high-resolution), and an output data rate from 1 Hz up to 1600/1344 Hz. It draws as little as 2 µA in low-power mode at 1 Hz and 0.5 µA in power-down, communicates over I²C or 3/4-wire SPI, and includes independent programmable interrupt generators with 6D orientation detection, a built-in temperature sensor, and a 32-sample FIFO. It's aimed squarely at battery-powered, always-on motion sensing: motion-activated functions, display orientation, shake control, pedometers, impact recognition and logging, and gaming/VR input.

Below are the questions engineers most often ask when bringing this part up, answered from the datasheet.

What is the LIS2DH12 used for, and how much power does it really take?

The intended applications map directly onto the hardware: ultra-low current, a ±2/±4/±8/±16 g range, and independent interrupt/6D detection. The power budget is the headline. Typical current by mode and ODR:

The key takeaway from that table: for a battery design running low-power mode at 1–10 Hz, you're spending roughly 2–3 µA. High-resolution mode matches normal mode at every ODR, but compared to low-power mode it costs extra starting at 10 Hz (+1 µA at 10 Hz, +5 µA at 50 Hz) — so pick low-power mode if every microamp counts.

How do I integrate the LIS2DH12 into a design (power, decoupling, and bus wiring)?

Power rails. The core runs from Vdd and the I/O pads from a separate Vdd_IO. The operating range is Vdd = 1.71–3.6 V (factory-calibrated at 2.5 V), and Vdd_IO is rated 1.71 V up to Vdd + 0.1 V. That +0.1 V constraint is the one people miss: match Vdd_IO to your MCU's I/O domain, but never let it exceed the core rail by more than 0.1 V — don't run Vdd_IO at 3.3 V on a 3.0 V core. Absolute maximum on either supply is –0.3 to 4.8 V, and the datasheet explicitly warns supply on any pin must never exceed 4.8 V.

Decoupling. Place 100 nF ceramic plus 10 µF aluminum as close as possible to pin 9 — which, per the pin table, is Vdd itself (pins 6/7/8 are GND).

Bus and straps.

• CS (pin 2) selects the interface: high = I²C enabled, low = SPI mode. For I²C operation, tie CS to Vdd_IO and drive it explicitly — it doesn't appear in the pull-up table, so don't rely on an internal pull-up.
• SDO/SA0 (pin 3) is internally pulled up, with a value that scales with Vdd_IO: 54.4 kΩ at 1.7 V, 49.2 kΩ at 1.8 V, 30.4 kΩ at 2.5 V, 20.4 kΩ at 3.6 V. Because it's pulled up, the part defaults to the SA0=1 I²C address; tie it to GND for the alternate address. You can disable the internal pull-up entirely by writing 90h to CTRL_REG0.
• SDA/SCL have no internal pull-ups, so you provide external I²C pull-ups sized for your bus speed and capacitance — standard I²C practice, not a datasheet-specified value.
• Res (pin 5): just connect to GND. No RC, no driver.

Logic levels. Digital thresholds are ratio-metric to Vdd_IO: VIH ≥ 0.8·Vdd_IO, VIL ≤ 0.2·Vdd_IO; outputs swing ≥ 0.9·Vdd_IO high and ≤ 0.1·Vdd_IO low. Size your pull-ups and check your MCU's I/O rail against those ratios, or reads will be unreliable.

I²C addresses. With SA0 low the 7-bit address is 0x18; with SA0 high it's 0x19 (write bytes 0x30/0x32, read bytes 0x31/0x33). The strap exists so you can put two LIS2DH12s on the same I²C bus — one tied high, one low.

Power sequencing trick. You can power down Vdd while keeping Vdd_IO: the measurement chain shuts off but the I²C/SPI bus stays functional. Useful for sleeping the sensor without locking up the bus — just remember the sensor reads nothing in that state.

What LIS2DH12 configuration gotchas should I watch out for?

• Set BDU=1 in CTRL_REG4. With the default BDU=0, the output registers update continuously and you can catch torn data reading LSB then MSB. BDU=1 holds the registers until both bytes are read. This is the single most useful habit for this part.
• BLE (byte order swap) only works in high-resolution mode. Don't try big-endian in normal or low-power mode.
• Vdd_IO must never exceed Vdd + 0.1 V, and control pins are rated –0.3 V to Vdd_IO + 0.3 V. If the bus is driven high while Vdd_IO is off, you're violating the pin rating — check your power-on sequence doesn't back-drive the bus.
• 6D detection has two behaviors. AOI-6D = 01 is movement recognition (interrupt on entering a zone, held one ODR period); 11 is direction recognition (asserted while orientation stays in the zone). Use 11 for latching display rotation, 01 for event detection. 4D detection is a 6D subset with Z-axis detection disabled, for portrait/landscape computation.
• The high-pass filter is routed per-function, not globally: FDS for the output/FIFO, HP_IA1/HP_IA2 for the two interrupt AOI functions, HPCLICK for click. HPM mode "autoreset on interrupt event" is handy for making interrupt thresholds recover automatically.
• The temperature sensor is off by default. You need TEMP_EN[1:0] in TEMP_CFG_REG and BDU in CTRL_REG4. Output lands in OUT_TEMP_L/H (0Ch/0Dh), 10-bit in high-res/normal, 8-bit in low-power. Conversion is 1 digit/°C typical, refreshed at the accelerometer ODR — but the datasheet publishes no offset, so you can measure temperature change but need your own reference for absolute temperature.
• Sensitivity is typical, not guaranteed. At ±2 g: 1 mg/digit (high-res), 4 mg/digit (normal), 16 mg/digit (low-power); it scales to 12/48/192 mg/digit at ±16 g (the ±16 g step is ×3 rather than the ×2 of the lower ranges). The datasheet leaves the min/max cells empty, so don't build tight accuracy budgets on these numbers.
• Zero-g offset shifts after assembly. Offset can move slightly after mounting or mechanical stress, so re-calibrate after assembly if you need absolute accuracy. Temp drift is modest: ±0.5 mg/°C max zero-g change.
• Soldering: the LGA package is qualified per JEDEC J-STD-020, and leave the Pin 1 Indicator pad unconnected — don't route or solder it.

How do I test and verify the LIS2DH12 after assembly?

1. Confirm the part is alive. Read WHO_AM_I at address 0Fh — it should return 0x33. If that readback fails, the problem is bus wiring, address strap, or power, not axis data.
2. Orientation sanity check. A sensor lying flat must read ~0 g on X and Y and ~1 g on Z — that 1 g on Z is gravity, not a fault. Small deviations after mounting are normal; flag them, don't fail the unit on them.
3. Run the self-test. It's commanded via ST[1:0] in CTRL_REG4 (01 = Self Test 0, 10 = Self Test 1), not a pin. After enabling, wait for valid data: 2 samples in low-power/normal mode, 8 samples in high-resolution mode. The pass criterion is the absolute output change between self-test on and off, which must fall in the 17–360 LSb window per axis. This is your production proof that the MEMS element survived assembly and the analog chain works.
4. Exercise power transitions. When going from high-resolution mode to power-down, read the REFERENCE (26h) register before returning to active mode — the datasheet requires this to fully reset the filtering block, or you'll see spurious post-wake data.
5. Check idle current. Power-down draws 0.5 µA typical. If your measured idle is well above that, the mode isn't engaged.

Note that factory calibration (sensitivity and zero-g) is stored in NVM and auto-loaded on every power-up, so no user calibration is required for basic operation — garbage data points to comms or config, not calibration.

Why is my LIS2DH12 circuit misbehaving? (Troubleshooting)

I²C returns nothing or garbage. The protocol requires a repeated START after the sub-address bytes for reads; a single START mis-sequences the transaction. Also, the 8-bit sub-address's MSb enables auto-increment — without it, multi-byte reads keep hitting the same register. And every byte must be acknowledged; check the SAK after the slave address.

SPI data is shifted. Data is driven on the falling edge of SPC and captured on the rising edge, and SPC is stopped high when CS is high. A master with different polarity/phase, or one that doesn't hold SPC high between frames, will misalign bits. Also check you didn't accidentally set SIM=1 in CTRL_REG4 — that silently switches the part to 3-wire SPI, and a 4-wire host then gets wrong data.

Reads are zeros / the sensor seems dead but the bus works. If Vdd is removed while Vdd_IO is present, the measurement chain is off but the bus stays functional — silent/zero data in that state is expected, not a fault. Both rails must be present for real measurements.

Z-axis reads ~1 g. That's gravity on a flat-mounted sensor. Correct behavior.

CTRL_REG0 misbehavior. Its reset value is 00010000 (SDO_PU_DISC = pull-up connected), and the datasheet warns to leave bits 0–6 at default for correct operation. If you poked that register, verify you only touched bit 7.

Handling damage. The part survives 3000 g for 0.5 ms or 10,000 g for 0.2 ms (powered or unpowered) and carries 2 kV HBM ESD protection, but it's still flagged as sensitive to mechanical shock and ESD during handling — improper handling can permanently damage it. Use ESD-safe handling and avoid shock during assembly; the self-test in step 3 above is how you catch assembly damage in production.

Part page: LIS2DH12.